Cannonlake
Created | H2 2017[1] |
---|---|
Transistors | 10 nm transistors |
Architecture | x86 |
Instructions | MMX, AES-NI, CLMUL, FMA3 |
Extensions | |
Socket | LGA 1151{[3]} |
Predecessor | |
Successor | |
Brand name(s) |
|
Cannonlake (formerly Skymont) is Intel's codename for the 10-nanometer die shrink of the Kaby Lake microarchitecture, expected to be released in the second half of 2017.[1][6] As a die shrink, Cannonlake is a new process in Intel's "Process-Architecture-Optimization" execution plan as the next step in semiconductor fabrication.[7] Cannonlake will be used in conjunction with Intel 200 Series chipsets, also known as Union Point. The platform as a whole will be named Union Bay.[7]
It has been speculated for a long time that reaching smaller process nodes would become impractical, leading to the end of Moore's Law. Intel however believes that it will be possible to reach at least 7 nm, though it will perhaps require use of materials other than silicon,[8] such as indium gallium arsenide (InGaAs).
Due to low 10 nm yields, Cannonlake will be limited to 15 Watt U and 5.2 Watt Y system-on-chip parts with GT2. Higher power mobile and desktop platforms will receive an update in the form of a 2nd 14 nm process refinement, Coffee Lake, that is said to share Cannonlake's architectural refinements.
The successors of the Cannonlake microarchitecture will be Icelake (2018) and Tigerlake (2019), which will represent Architecture and Optimization of the Intel Process-Architecture-Optimization Model.[9][10]
Features
- 200 Series chipset (Union Point)
- Thermal design power (TDP) up to 95 W (LGA 1151)
See also
References
- 1 2 "Intel confirms tick-tock-shattering Kaby Lake processor as Moore's Law falters". Ars Technica. 2015-07-16.
- ↑ Kirsch, Nathan (2016-02-21). "Intel Cannonlake Added To LLVM's Clang – AVX-512". Legit Reviews. Retrieved 2016-10-23.
- ↑ http://www.pcgamesn.com/intel-cannonlake-10nm. Missing or empty
|title=
(help) - 1 2 3 4 "What's the Name of Intel's Third 10-Nanometer Chip?". The Motley Fool. 2016-01-18.
- ↑ http://wccftech.com/intel-14nm-coffee-lake-10nm-cannonlake-2018/
- ↑ "Intel TOCK BLOCK: 10nm Cannonlake delayed to 2017, bonus 14nm Kaby Lake to '16". The Register. 16 Jul 2015. Retrieved 2015-10-03.
- 1 2 "Intel's Cannonlake 10nm Microarchitecture is Due For 2016 - Compatible On Union Bay With Union Point PCH". WCCFTech. 2014-06-06. Retrieved 24 September 2014.
- ↑ "Intel forges ahead to 10nm, will move away from silicon at 7nm". Ars Technica. 2015-02-23.
- ↑ "Intel's Kaby Lake will sneak in before the 10nm process". Digital Trends. 25 Jan 2016. Retrieved 2016-02-01.
- ↑ "What's the Name of Intel's Third 10-Nanometer Chip?". The Motley Fool. 25 Jan 2016. Retrieved 2016-02-01.